On the chip implementation of analogic algorithms for optical detection of some layout errors of printed circuit boards

Author

Tömördi, Katalin ; Foldesy, Peter ; Szolgay, Péter

Author_Institution

Comput. & Autom. Inst., Hungarian Acad. of Sci., Budapest, Hungary

fYear

1998

fDate

14-17 Apr 1998

Firstpage

162

Lastpage

168

Abstract

Printed circuit board layout inspection methods are mostly based on local geometric information, therefore they are well suited to the cellular neural networks (CNN) paradigm. The wire break, the wire and isolation width violation and an “H” type short circuits detector analogic algorithms were tested on a 20*22 CNN Universal Machine (CNNUM) chip working in the CNN Chip Prototyping System (CCPS) and on the CNN Engine Board (CNNEB), and the results were compared to the commercially available inspection systems

Keywords

CMOS analogue integrated circuits; analogue processing circuits; automatic optical inspection; cellular neural nets; neural chips; printed circuit layout; printed circuit testing; CCPS; CMOS technology; CNN Chip Prototyping System; CNN Engine Board; CNN Universal Machine; CNNEB; CNNUM; H-type short circuits; PCB; analogic algorithms; cellular neural networks; chip implementation; isolation width violation; layout errors; optical detection; printed circuit board layout inspection; wire break; wire width violation; Cellular neural networks; Circuit testing; Detectors; Geometrical optics; Inspection; Optical computing; Printed circuits; System testing; Turing machines; Wire;

fLanguage

English

Publisher

ieee

Conference_Titel

Cellular Neural Networks and Their Applications Proceedings, 1998 Fifth IEEE International Workshop on

Conference_Location

London

Print_ISBN

0-7803-4867-2

Type

conf

DOI

10.1109/CNNA.1998.685356

Filename

685356