Title :
Performance Enhancement in 45-nm Ni Fully-Silicided Gate/High-k CMIS Using Substrate Ion Implantation
Author :
Nishida, Y. ; Yamashita, T. ; Yamanari, S. ; Higashi, M. ; Shiga, K. ; Murata, N. ; Mizutani, M. ; Inoue, M. ; Sakashita, S. ; Mori, K. ; Yugami, J. ; Hayashi, T. ; Shimizu, A. ; Oda, H. ; Eimori, T. ; Tsuchiya, O.
Author_Institution :
Wafer Process Eng. Dev. Div., Renesas Technol. Corp., Hyogo
Abstract :
High performance Ni-FUSI/HfSiON CMIS with suitable Vth in a wide Lg range is presented. This is accomplished by ion implantation to substrate and phase control of Ni-FUSI gate. Threshold voltage of NiSi-FUSI NMIS is controlled by nitrogen implantation, and that of Ni2Si-FUSI PMIS is controlled by fluorine implantation. It is demonstrated that N/F incorporation can realize 0.2-V-low |Vth|, high carrier mobility, and high reliability for both NMIS and PMIS. Drain current increases by 16% for NMIS and by 55% for PMIS compared with poly-Si/high-k CMIS. Substrate ion implantation engineering is promising for multi-Vth CMIS platform for 45-nm node and beyond
Keywords :
CMOS integrated circuits; MISFET; carrier mobility; fluorine; hafnium compounds; ion implantation; metal-insulator boundaries; nanotechnology; nickel compounds; nitrogen compounds; oxygen compounds; silicon alloys; silicon compounds; substrates; 45 nm; CMIS; FUSI NMIS; FUSI PMIS; Ni2Si-HfSiON; carrier mobility; phase control; substrate ion implantation; Dielectric substrates; Etching; High K dielectric materials; High-K gate dielectrics; Ion implantation; Nickel; Nitrogen; Temperature; Threshold voltage; Voltage control;
Conference_Titel :
VLSI Technology, 2006. Digest of Technical Papers. 2006 Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
1-4244-0005-8
DOI :
10.1109/VLSIT.2006.1705272
