A Raised Source/Drain Extension pFET on Si [110] Realized by In-situ Doped Selective Epitaxy Technology

Author

Wang, Jiacheng ; Kikuchi, Yutaka ; Tateshita, Y. ; Kato, Toshihiko ; Kataoka, Takeshi ; Hirano, Takuichi ; Nagano, Kotaro ; Ikuta, Takashi ; Miyanami, Y. ; Fujita, S. ; Hiyama, Shoko ; Yamamoto, Ryo ; Kanda, S. ; Yamakawa, Satoshi ; Kimura, Tomohiro ; Kug

Author_Institution

Semicond. Technol. Dev. Group, Sony Corp., Kanagawa

fYear

0

fDate

0-0 0

Firstpage

190

Lastpage

191

Abstract

A raised source/drain extension (RSDE) pFET on (110) Si wafer is demonstrated for the first time with in-situ doped selective epitaxy technology. Roll-off has been effectively improved, resulting from the elimination of ion channeling in (110) Si. Due to the hole mobility enhancement and parasitic resistance reduction, ion of 389muA/mum (Vd= -1.0 V) has been achieved at Lmin around 30nm extracted at Ioff = 100 nA/mum, which is 83% higher than that of conventional planar (100) pFET

Keywords

MOSFET; elemental semiconductors; epitaxial growth; hole mobility; semiconductor doping; silicon; Si; Si (110); hole mobility enhancement; in-situ doping; pFET; parasitic resistance reduction; raised source-drain extension; selective epitaxy technology; Annealing; Atomic layer deposition; Dielectrics; Epitaxial growth; Etching; Fabrication; Ion implantation; MOSFET circuits; Oxidation; Silicon compounds;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, 2006. Digest of Technical Papers. 2006 Symposium on

Conference_Location

Honolulu, HI

Print_ISBN

1-4244-0005-8

Type

conf

DOI

10.1109/VLSIT.2006.1705281

Filename

1705281