Practical random sampling of potential defects for analog fault simulation

Analog simulation is much less efficient than digital simulation, so it is essential to reduce the number of potential defects to be simulated when assessing defect coverage of an analog circuit´s test. Simple random sampling (SRS) is a published technique for digital fault sampling; stratified sampling is an improvement explored for analog fault simulation. This paper compares the defect coverage estimation accuracy of several sampling techniques and our improvements based on defect-likelihood-weighted selection, as measured by confidence interval. For practical cases, it is shown that the estimation accuracy of SRS gets progressively worse as defects become less uniform in likelihood, but with weighted selection, accuracy improves. We conclude that defect coverage can always be estimated sufficiently accurately by simulating fewer than a thousand defects (and usually much fewer), regardless of circuit size, analog/digital content, and defect likelihood distribution.