• DocumentCode
    2627077
  • Title

    UML based hierarchical state diagram approach for protocol designs

  • Author

    Sudhakaran, Sreejith ; Cheung, Wah Man ; McDonald-Maier, Klaus D. ; Howells, Gareth

  • Author_Institution
    Sch. of Comput. Sci. & Electron. Eng., Univ. of Essex, Colchester, UK
  • fYear
    2010
  • fDate
    8-9 Sept. 2010
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    The increasing complexity in the design of protocol based sequential digital systems such as USB3.0 and PCI express (PCIe), is leading to an increased time to market constraint. This paper introduces a UML based visual design approach to address this increased complexity in the design of IP as well as System-on-Chips (SoC). A hardware development method for USB3.0 device using the Unified Modeling Language is explored. It focuses on the conversion of UML structure diagrams and hierarchical state machines into synthesizable hardware description language. A Model Driven Development (MDD) method using UML state diagrams and hierarchical design breakdown approach is used for the development the synthesizable HDL for USB3.0 device IP with more than 20 sequential states.
  • Keywords
    Unified Modeling Language; finite state machines; hardware description languages; industrial property; integrated circuit design; peripheral interfaces; protocols; system-on-chip; IP design; PCI express; UML based hierarchical state diagram approach; UML based visual design approach; UML structure diagrams; USB3.0; hierarchical design breakdown approach; hierarchical state machines; model driven development method; protocol design based sequential digital systems; synthesizable hardware description language; system-on-chips; Complexity theory; Hardware; Hardware design languages; Integrated circuit modeling; Object oriented modeling; System-on-a-chip; Unified modeling language; Hardware Development Language (HDL); Intellectual Property(IP); Link Training and Status State Machine (LTSSM); Model Driven Development (MDD); State machine based design; USB3.0; Unified Modelling Language (UML); Verilog;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Science and Electronic Engineering Conference (CEEC), 2010 2nd
  • Conference_Location
    Colchester
  • Print_ISBN
    978-1-4244-9029-5
  • Type

    conf

  • DOI
    10.1109/CEEC.2010.5606496
  • Filename
    5606496