DocumentCode :
2627286
Title :
A 1-ps Resolution On-Chip Sampling Oscilloscope with 64:1 Tunable Sampling Range Based on Ramp Waveform Division Scheme
Author :
Inagaki, Kenichi ; Antono, Danardono Dwi ; Takamiya, Makoto ; Kumashiro, Shigetaka ; Sakurai, Takayasu
Author_Institution :
Tokyo Univ.
fYear :
0
fDate :
0-0 0
Firstpage :
61
Lastpage :
62
Abstract :
An on-chip sampling oscilloscope with lps timing resolution is realized in 90nm CMOS process based on a proposed ramp waveform division scheme for precise signal integrity and power-line integrity measurement. The resolution in time is variable from 1ps to 64ps in 64 steps. A novel on-chip inductance measurement procedure is also proposed
Keywords :
CMOS integrated circuits; inductance measurement; oscilloscopes; ramp generators; timing circuits; 1 to 64 ps; CMOS process; on-chip inductance measurement; on-chip sampling oscilloscope; power-line integrity measurement; ramp waveform division scheme; signal integrity; timing resolution; Clocks; Crosstalk; Oscilloscopes; Sampling methods; Semiconductor device measurement; Semiconductor device noise; Signal generators; Signal resolution; Timing; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Circuits, 2006. Digest of Technical Papers. 2006 Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
1-4244-0006-6
Type :
conf
DOI :
10.1109/VLSIC.2006.1705312
Filename :
1705312
Link To Document :
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