Title :
Passive delay-based macromodels for Signal Integrity verification of multi-chip links
Author :
Chinea, A. ; Triverio, P. ; Grivet-Talocia, S.
Author_Institution :
Dip. Elettron., Politec. di Torino, Torino, Italy
Abstract :
This paper presents a general strategy for the electrical performance assessment of electrically long multi-chip links. A black-box time-domain macromodel is first derived from tabulated frequency responses in scattering form. This model is structured as a combination of ideal delay terms with frequency-dependent rational coefficients. Two passivity enforcement schemes are then presented, enabling safe and reliable transient simulations of the multi-chip link with a standard circuit solver, including nonlinear drivers and receivers.
Keywords :
delays; frequency response; integrated circuit interconnections; integrated circuit modelling; black-box time-domain macromodel; electrical performance assessment; frequency-dependent rational coefficients; multichip links; passive delay-based macromodel; signal integrity verification; tabulated frequency response; Bit error rate; Circuit simulation; Connectors; Delay effects; Dielectric losses; Frequency domain analysis; Integrated circuit interconnections; Reflection; Scattering; Time domain analysis;
Conference_Titel :
Signal Propagation on Interconnects (SPI), 2010 IEEE 14th Workshop on
Conference_Location :
Hildesheim
Print_ISBN :
978-1-4244-7611-4
DOI :
10.1109/SPI.2010.5483553
