FPGA based self calibrating 40 picosecond resolution, wide range Time to Digital Converter

We present FPGA-based self calibrating Time to Digital Converter (TDC) architecture specific to applications where one is interested in measuring absolute time of occurrence of an event since t0 by combining coarse (simple binary counter at system clock speed) and fine TDC. The architecture relies on an accurate crystal oscillator to provide stable system clock reference to generate calibration test pulse. It uses two controllable ring oscillators with very small difference in frequencies, where the frequency difference determines the achievable resolution. The scheme was implemented on Altera Stratix II device and we have measured a resolution of 40 ps.