KPiX, an array of self triggered charge sensitive cells generating digital time and amplitude information.

The Silicon Detector proposed for the International Linear Collider (ILC) requires electronic read-out that can be tightly coupled to the silicon detectors envisioned for the tracker and the electromagnetic calorimeter. The KPiX is a 1024-channel read-out chip that bump-bonds to the detector and communicates through a few digital signals, power, and detector bias. The KPiX front-end is a low-noise dual-range charge-amplifier with a dynamic range of 17 bit, achieved by autonomous switching of the feedback capacitor. The device takes advantage of the ILC duty cycle of 1 ms trains at 5 Hz rate by lowering the supply current after the data acquisition cycle for an average power consumption of ≪20 μW/channel. During the 1 ms train, up to four events exceeding a programmable threshold can be stored, the amplitude as a voltage on a capacitor for subsequent digitization, the event time in digital format. The chip can be configured for other than ILC applications.