Title :
Concurrent resynthesis for network optimization
Author :
Chen, Kuang-Chien ; Fujita, Masahiro
Abstract :
An algorithm called C-RENO (Concurrent Resynthesis for Network Optimization) is presented for the optimization of multilevel combinational networks. In C-RENO, a given network is optimized for global optimality by resynthesizing a set of gates concurrently, using other gates in the network. C-RENO uses the generalized ratio-set algorithm, which enables one to resynthesize complex gates instead of only simple gates (e.g. NAND and NOR), exploring larger reconfiguration space. High-quality networks are derived by C-RENO even if no network don´t-cares are used, and results which are not achievable by other methods have been obtained
Keywords :
combinatorial circuits; logic CAD; many-valued logics; minimisation of switching nets; C-RENO; Concurrent Resynthesis for Network Optimization; generalized ratio-set algorithm; multilevel combinational networks; reconfiguration space; Algorithm design and analysis; Data structures; Laboratories; Minimization methods; Network synthesis; Reconfigurable logic; Space exploration; Timing;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1991. ICCD '91. Proceedings, 1991 IEEE International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-2270-9
DOI :
10.1109/ICCD.1991.139841
