DocumentCode :
262824
Title :
Test pattern generation in presence of unknown values based on restricted symbolic logic
Author :
Erb, Dominik ; Scheibler, Karsten ; Kochte, Michael A. ; Sauer, Matthias ; Wunderlich, Hans-Joachim ; Becker, Bernd
Author_Institution :
Univ. of Freiburg, Freiburg, Germany
fYear :
2014
fDate :
20-23 Oct. 2014
Firstpage :
1
Lastpage :
10
Abstract :
Test generation algorithms based on standard n-valued logic algebras are pessimistic in presence of unknown (X) values, overestimate the number of signals with X-values and underestimate fault coverage.
Keywords :
automatic test pattern generation; logic circuits; logic testing; ATPG algorithm; QBF; RSL; quantified Boolean formula; restricted symbolic logic; scalability; standard n-valued logic algebra; test pattern generation algorithm; underestimate fault coverage; Algebra; Automatic test pattern generation; Circuit faults; Encoding; Integrated circuit modeling; Logic gates; Runtime; ATPG; QBF; Restricted symbolic logic; SAT; Unknown values; test generation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference (ITC), 2014 IEEE International
Conference_Location :
Seattle, WA
Type :
conf
DOI :
10.1109/TEST.2014.7035350
Filename :
7035350
Link To Document :
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