Title :
A 14-Bit 5MS/s Continuous-Time Delta-Sigma A/D Modulator
Author :
Li, Zhimin ; Fiez, Terri S.
Author_Institution :
Sch. of EECS, Oregon State Univ., Corvallis, OR
Abstract :
A continuous-time delta-sigma A/D modulator providing 85dB DR with 5MS/s output rate in a 2.5V 0.25mum CMOS process is presented. The modulator has a single-stage, dual-loop architecture allowing nearly one clock period excess loop delay. A multi-bit quantizer is used to increase resolution and non-return-to-zero DACs are adopted to reduce clock jitter sensitivity. Capacitor tuning is utilized to overcome process variation. Calibration is implemented to suppress DAC mismatch. Clocked at 60MHz, the chip consumes 50 mW
Keywords :
CMOS digital integrated circuits; continuous time systems; delta-sigma modulation; integrated circuit design; quantisation (signal); 0.25 micron; 14 bit; 2.5 V; 50 mW; 60 MHz; A/D modulator; CMOS process; capacitor tuning; clock jitter; continuous-time modulator; delta-sigma modulator; dual-loop architecture; multibit quantizer; nonreturn-to-zero DAC; single-stage architecture; Bandwidth; Boosting; Calibration; Clocks; Delay; Delta modulation; Jitter; Linearity; Signal design; Signal resolution;
Conference_Titel :
VLSI Circuits, 2006. Digest of Technical Papers. 2006 Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
1-4244-0006-6
DOI :
10.1109/VLSIC.2006.1705361
