A Configurable Enhanced T/sup 2/RAM Macro for System-Level Power Management Unified Memory

Author

Arimoto, Kazutami ; Morishita, Fukashi ; Hayashi, Isamu ; Gyohten, Takayuki ; Noda, Hideyuki ; Ipposhi, Takashi ; Dosaka, Katsumi

Author_Institution

Syst. Core Technol. Div., Renesas Technol. Corp., Hyogo

fYear

0

fDate

0-0 0

Firstpage

182

Lastpage

183

Abstract

TTRAM can provide high speed, low power and high density with CMOS compatible SOI process. However it is difficult to handle as the unified memory required for advanced SoC because it needs the simple control sensing operation for memory compiler, higher cell efficiency, and lower voltage operation for dynamic frequency and voltage control. The enhanced TTRAM (ET²RAM) can solve these issues and the key technologies provide 0.5V memory operation, compact and higher sensitivity sense amplifier, and programmable multi-bank array

Keywords

CMOS integrated circuits; frequency control; integrated circuit layout; low-power electronics; random-access storage; silicon-on-insulator; system-on-chip; voltage control; 0.5 V; CMOS; SOI process; SoC; TTRAM; frequency control; memory compiler; programmable multibank array; sense amplifier; system-level power management; unified memory; voltage control; Control systems; Energy management; Joining processes; Memory management; Power system management; Random access memory; Read-write memory; Tin; Voltage control; Writing;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits, 2006. Digest of Technical Papers. 2006 Symposium on

Conference_Location

Honolulu, HI

Print_ISBN

1-4244-0006-6

Type

conf

DOI

10.1109/VLSIC.2006.1705370

Filename

1705370