• DocumentCode
    2628945
  • Title

    DFT Implementationis for Striking the Right Balance between Test Cost and Test Quality for Automotive SOCs

  • Author

    Dutta, Amit ; Alampaily, Srinivasulu ; V, Prasanth ; Parekhji, Rubin A.

  • Author_Institution
    Texas Instruments, Bangalore, India
  • fYear
    2008
  • fDate
    28-30 Oct. 2008
  • Firstpage
    1
  • Lastpage
    10
  • Abstract
    Automotive electronics today is characterased by two requirements. One is the well-known aspect of reliability of the components used to build the system. The other is the increasing need for commoditisation of these systems. These requirements pose the dual challenges of meeting very strict quality goals, while at the same time also adhering to affordable cost goals. Devices designed for one end application often find use in others. Consequently, it is important that these devices be designed and tested in a scaleable manner, wherein the high quality and low cost goals are simultaneously met. In this paper, a case study is presented on a set of recently designed automotive chips at Texas Instruments (India). Illustrations of different techniques are given, together with supporting data. These techniques are generic enough to be adopted and further improvised to enhance test cost and test quality optimisations in a larger class of SOCs as well.
  • Keywords
    Automatic testing; Automotive electronics; Automotive engineering; Circuit testing; Costs; Design for testability; Electronic equipment testing; Instruments; Integrated circuit testing; System testing; SOC testing, automotive quality, test cost, test tradeoffs;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 2008. ITC 2008. IEEE International
  • Conference_Location
    Santa Clara, CA
  • ISSN
    1089-3539
  • Print_ISBN
    978-1-4244-2402-3
  • Electronic_ISBN
    1089-3539
  • Type

    conf

  • DOI
    10.1109/TEST.2008.5483610
  • Filename
    5483610