A new switched-capacitor inductance simulation circuit using unity gain buffers

A switched-capacitor (SC) inductance simulation circuit which simulates floating inductance using only one unity-gain buffer (UGB) and which is controlled by a two-phase clock is described. The inductor improves the sensitivity of a previously proposed circuit without degrading its features. The spread between capacitor values is four, and that of the whole filter which uses the SC inductor tends to be small. In addition, the circuit is insensitive to the parasitic capacitance which arises from the bottom plates of the integrated capacitors. Experimental results for a fifth-order low-pass filter using the proposed SC inductor are described