• DocumentCode
    2629120
  • Title

    Fast differential fault simulation by dynamic fault ordering

  • Author

    Cabodi, G. ; Gai, S. ; Reorda, M. Sonza

  • Author_Institution
    Dipartimento di Autom. e Inf., Politecnico di Torino, Italy
  • fYear
    1991
  • fDate
    14-16 Oct 1991
  • Firstpage
    60
  • Lastpage
    63
  • Abstract
    A technique that makes it possible to significantly improve the effectiveness of the differential algorithm for the fault simulation of synchronous sequential circuits is presented. The approach is based on dynamically reordering the fault list before the simulation of each input pattern: faults not yet detected are grouped according to a strategy aiming at minimizing the status differences between successive faults. In such a way the activity to be processed while computing each faulty circuit is minimized at a quite low computational cost. Experimental results are provided showing the effectiveness of the proposed method
  • Keywords
    VLSI; circuit analysis computing; failure analysis; logic testing; sequential circuits; differential algorithm; differential fault simulation; dynamic fault ordering; fault list; successive faults; synchronous sequential circuits; Availability; Central Processing Unit; Circuit faults; Circuit simulation; Computational efficiency; Computational modeling; Discrete event simulation; Electrical fault detection; Fault detection; Sequential circuits;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design: VLSI in Computers and Processors, 1991. ICCD '91. Proceedings, 1991 IEEE International Conference on
  • Conference_Location
    Cambridge, MA
  • Print_ISBN
    0-8186-2270-9
  • Type

    conf

  • DOI
    10.1109/ICCD.1991.139845
  • Filename
    139845