Systolic implementations of two-dimensional recursive digital filters

Implementations for two-dimensional recursive filters using systolic arrays with linear structures are presented. The processing elements used are modular and thus lead to cost-effective designs. The implementations have the maximum data rate possible, i.e. a new input sample is supplied and as new output sample is obtained every sampling period. The latency of all the systolic arrays designed is equal to one. The number of processing elements required is on the order of w×h, where w and h are, respectively, the width and height of the window used