Title :
A novel digital multiplier chip based on the neural network
Author :
Chung, Ho Sun ; Ryeu, Jin Kyung ; Lee, Wu, II
Author_Institution :
Dept. of Electron. Eng., Kyungpook Nat. Univ., Taegu, South Korea
Abstract :
A novel digital multiplier, based on the unidirectional-feedback-type (UFT) neural network, was designed and implemented in VLSI. The number of feedback connections in the proposed UFT neural net work has been reduced to a half of the number required in the Hopfield model. The application of the UFT neural network to digital circuits is illustrated in designing a binary multiplier chip. The architecture of the digital multiplier used in this work is simpler than those of earlier ones designed by other conventional digital techniques
Keywords :
CMOS integrated circuits; VLSI; digital arithmetic; digital integrated circuits; multiplying circuits; neural nets; CMOS; VLSI; binary multiplier chip; digital multiplier chip; feedback connections; neural network; unidirectional feedback type neural network; Counting circuits; Digital circuits; Hopfield neural networks; Neural networks; Neurofeedback; Neurons; Optical feedback; Sun; Very large scale integration; Voltage;
Conference_Titel :
Circuits and Systems, 1990., IEEE International Symposium on
Conference_Location :
New Orleans, LA
DOI :
10.1109/ISCAS.1990.112288
