A simple architecture of low voltage GHz BiCMOS four-quadrant analogue multiplier using complementary voltage follower

A new architecture of simple low voltage BiCMOS four-quadrant multiplier is proposed and analyzed. It operates with ±1.5 V power supplies and 3 V_p-p fully input signal swings. Simulation results based on AMS 0.8 μm n-well BiCMOS process parameters are given to verify the theoretical analysis. The architecture of four multipliers typically have a nonlinearity error less than 1% over ±1.5 V input range and a -3 dB bandwidth of several GHz. The total harmonic distortion for frequencies up to 4 GHz is less than 6% with maximum input voltage at ±1.5 V. Simple structure, low-voltage and low power capability, and high performance make the proposed multiplier quite feasible in many GHz nonlinear signal processing applications