DocumentCode :
2631811
Title :
Design of USB2.0 Device Controller IP Soft-Core Based on SoC Technology and WISHBONE Bus
Author :
Ziting, Wang ; Lei, Xu ; Panfeng, Li ; Wenbo, Geng
Volume :
3
fYear :
2009
fDate :
March 31 2009-April 2 2009
Firstpage :
440
Lastpage :
443
Abstract :
With a widespread development of SoC technology and universal application of USB protocol, embedded USB device controller IP core has become more and more important in chip design. Based on the WISHBONE on-chip bus by OpenCores organization maintaining, the paper designs USB2.0 device controller IP soft-core which accords with USB2.0 protocol. Through the simulation verification and the logic synthesis, the IP soft-core accords with USB2.0psilas data norms, data flow and related event detection, can be flexibly applied to various embedded environment.
Keywords :
system buses; system-on-chip; transport protocols; IP soft-core; SoC technology; USB2.0 device controller; USB2.0 protocol; WISHBONE bus; embedded USB device controller IP core; event detection; logic synthesis; simulation verification; system-on-chip; universal serial bus; Communication system control; Control systems; Data communication; Integrated circuit interconnections; Packaging; Physical layer; Protocols; Registers; System-on-a-chip; Universal Serial Bus; IP Soft-Core; SoC; USB2.0 Device controller; WISHBONE Bus;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Science and Information Engineering, 2009 WRI World Congress on
Conference_Location :
Los Angeles, CA
Print_ISBN :
978-0-7695-3507-4
Type :
conf
DOI :
10.1109/CSIE.2009.159
Filename :
5170880
Link To Document :
بازگشت