DocumentCode :
2631834
Title :
Mixed logic and analog implementation of large neighbourhood cloning templates for CNNs
Author :
Akbari-Dilmaghani, R.
Author_Institution :
Dept. of Electr. & Electron. Eng., Imperial Coll. of Sci., Technol. & Med., London, UK
fYear :
1998
fDate :
14-17 Apr 1998
Firstpage :
277
Lastpage :
281
Abstract :
An approach to the implementation of large neighbourhood (r>1) cloning templates in cellular neural networks (CNNs) is presented while the number of interconnections and the circuit complexity are preserved at a level which is practical for existing VLSI technology. The proposed method employs mixed pass transistors logic and analog circuitry to implement r>1 CNNs. Simulation results are presented to confirm the viability of the proposed methods
Keywords :
CMOS integrated circuits; VLSI; analogue processing circuits; cellular neural nets; integrated logic circuits; mixed analogue-digital integrated circuits; neural chips; 0.8 micron; CMOS technology; VLSI technology; analog circuitry; cellular neural networks; circuit complexity; large neighbourhood cloning templates; mixed pass transistors logic; Boolean functions; Cellular neural networks; Circuit simulation; Cloning; Complexity theory; Computer simulation; Educational institutions; Integrated circuit interconnections; Logic circuits; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Cellular Neural Networks and Their Applications Proceedings, 1998 Fifth IEEE International Workshop on
Conference_Location :
London
Print_ISBN :
0-7803-4867-2
Type :
conf
DOI :
10.1109/CNNA.1998.685387
Filename :
685387
Link To Document :
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