DocumentCode
2632197
Title
A Cascaded-Impedance-Inverter Model of Wide-Band Frequency Triplers
Author
Redd, J.C. ; Kotzebue, K.L.
fYear
1971
fDate
16-19 May 1971
Firstpage
96
Lastpage
98
Abstract
A charge-storage diode frequency tripler can be modeled as two cascaded impedance inverters. This approach has been used to design and construct a tripler at 1.06 GHz input frequency with a measured midband efficiency of 50% and a 3 dB band-width of 38%.
Keywords
Bandwidth; Circuits; Diodes; Frequency measurement; Frequency synthesizers; Harmonic analysis; Impedance; Inverters; Piecewise linear techniques; Wideband;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Symposium Digest, 1971 IEEE GMTT International
Conference_Location
Washington, DC, USA
Type
conf
DOI
10.1109/GMTT.1971.1122918
Filename
1122918
Link To Document