Dependability analysis in HW-SW codesign

The increasing complexity of todays computing systems necessitates new design methodologies. One of the most promising methods is hardware-software codesign, that supports unified hardware-software modeling at different levels of abstraction, and hardware-software synthesis. As applications include even critical applications, dependability becomes an important design issue. A novel approach for the underlying modeling in hardware-software codesign is presented in this paper. The basic idea of this new method is the extension of the descriptions of the functional elements with the models of fault effects and error propagation at each level of the hardware-software codesign hierarchy. From the extended system model various dependability measures can be extracted. This paper concerns test generation, solved by a generalized form of the well-known logic gate level test generation algorithms and extraction of the input model of integrated diagnostics, allowing testability and diagnosability analysis of the system