Title :
Run-time adaptable on-chip thermal triggers
Author :
Kumar, Pratyush ; Atienza, David
Author_Institution :
Embedded Syst. Lab. (ESL), EPFL, Lausanne, Switzerland
Abstract :
With ever-increasing power densities, Dynamic Thermal Management (DTM) techniques have become mainstream in today´s systems. An important component of such techniques is the thermal trigger. It has been shown that predictive thermal triggers can outperform reactive ones. In this paper, we present a novel trade-off space of predictive thermal triggers, and compare different approaches proposed in the literature. We argue that run-time adaptability is a crucial parameter of interest. We present a run-time adaptable thermal simulator compatible with arbitrary sensor configuration based on the Neural Network (NN) simulator presented in. We present experimental results on Niagara UltraSPARC T1 chip with real-life benchmark applications. Our results quantitatively establish the effectiveness of the proposed simulator for reducing (by up to 90%), the otherwise unacceptably high errors, that can arise due to expected leakage current variation and design-time thermal modeling errors.
Keywords :
leakage currents; microprocessor chips; neural nets; thermal management (packaging); DTM technique; NN simulator; Niagara UltraSPARC T1 chip; arbitrary sensor configuration; design-time thermal modeling error; dynamic thermal management; leakage current variation; neural network simulator; on-chip thermal trigger; power densities; predictive thermal trigger; run-time adaptability; thermal simulator; Accuracy; Adaptation model; Artificial neural networks; Computational modeling; Layout; Mathematical model; System-on-a-chip;
Conference_Titel :
Design Automation Conference (ASP-DAC), 2011 16th Asia and South Pacific
Conference_Location :
Yokohama
Print_ISBN :
978-1-4244-7515-5
DOI :
10.1109/ASPDAC.2011.5722194