Infinite impulse response switched-capacitor interpolators with optimum implementation

Author

Martins, R.P. ; Franca, J.E.

Author_Institution

Dept. of Electr. Eng. & Comput., Inst. Superior Tecnico, Lisboa, Portugal

fYear

1990

fDate

1-3 May 1990

Firstpage

2193

Abstract

A family of infinite-impulse response (IIR) switched-capacitor (SC) interpolator building blocks that provide a sampling-rate increase from F_s to LF_s is presented. The speed requirements of the amplifiers are determined by the lower input sampling frequency F_s. By using a complementary structure of their decimator counterparts, the interpolators allow the realization of arbitrary baseband and anti-imaging amplitude responses using a minimum number of switching waveforms. Since they possess similar attractive features with respect to capacitance spread, total capacitor area, and speed requirements of the amplifiers, they are also attractive for integration. The design of a simple third-order IIR SC interpolator building block with a sampling-rate increase of L=2 is illustrated

Keywords

active networks; interpolation; switched capacitor networks; amplifiers; capacitance spread; complementary structure; decimator counterparts; infinite-impulse response; integration; optimum implementation; sampling-rate increase; speed requirements; switched-capacitor interpolators; third-order IIR SC building block; total capacitor area; Baseband; Capacitance; Capacitors; Finite impulse response filter; Frequency; IIR filters; Operational amplifiers; Polynomials; Sampling methods; Switching circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1990., IEEE International Symposium on

Conference_Location

New Orleans, LA

Type

conf

DOI

10.1109/ISCAS.1990.112296

Filename

112296