• DocumentCode
    2633274
  • Title

    Parallel implementation of volume rendering on Denali graphics systems

  • Author

    Guan, Sheng-Yih ; Bleiweiss, Avi ; Lipes, Richard

  • Author_Institution
    Silicon Graphics Inc., USA
  • fYear
    1995
  • fDate
    25-28 Apr 1995
  • Firstpage
    700
  • Lastpage
    706
  • Abstract
    Traditional 3D graphics systems, e.g. Denali, with texture mapping capability implement the standard graphics pipeline in a pipelined parallel architecture. The systems are sufficiently powerful and flexible to support efficiently applications such as volume rendering. We discuss how Denali, manufactured by Kubota Graphics Corporation accelerates volume rendering. Volume rendering methods including maximum intensity projection and iso-surface rendering are implemented using Denali´s 3D texture mapping capability. The volume rendering realization utilizes a partitioning data allocation scheme instead of a replicating approach to reduce dramatically texture memory requirements. Denali has two major parallel components: Transformation and Rasterization Modules (TRMs) and Frame Buffer Modules (FBMs). The flexible TRMs, containing a general purpose RISC processor, use object parallelism. The FBMs, containing hardware ASICs and pixel memory, use pixel parallelism. The TRMs and FBMs use dynamic and static load balancing schemes respectively to assign a roughly equal amount of computation to each parallel node
  • Keywords
    Acceleration; Graphics; Hardware; Load management; Manufacturing; Parallel architectures; Parallel processing; Pipelines; Reduced instruction set computing; Rendering (computer graphics);
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel Processing Symposium, 1995. Proceedings., 9th International
  • Conference_Location
    Santa Barbara, CA
  • Print_ISBN
    0-8186-7074-6
  • Type

    conf

  • DOI
    10.1109/IPPS.1995.395872
  • Filename
    395872