DocumentCode
2633442
Title
Handling dynamic frequency changes in statically scheduled cycle-accurate simulation
Author
Gligor, Marius ; Pétrot, Frédéric
Author_Institution
Syst.-Level Synthesis Group, TIMA Lab., Grenoble, France
fYear
2011
fDate
25-28 Jan. 2011
Firstpage
407
Lastpage
412
Abstract
Although high level simulation models are being increasingly used for digital electronic system validation, cycle accuracy is still required in some cases, such as hardware protocol validation or accurate power/energy estimation. Cycle-accurate simulation is however slow and acceleration approaches make the assumption of a single constant clock, which is not true anymore with the generalization of dynamic voltage and frequency scaling techniques. Fast cycle-accurate simulators supporting several clocks whose frequencies can change at run time are thus needed. This paper presents two algorithms we designed for this purpose and details their properties and implementations.
Keywords
circuit simulation; clocks; electronic engineering computing; high level synthesis; cycle accuracy; digital electronic system validation; dynamic frequency change; dynamic voltage; frequency scaling; high level simulation model; single constant clock; statically scheduled cycle-accurate simulation; Clocks; Computational modeling; Computer architecture; Frequency conversion; Hardware; Integrated circuit modeling; Registers;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference (ASP-DAC), 2011 16th Asia and South Pacific
Conference_Location
Yokohama
ISSN
2153-6961
Print_ISBN
978-1-4244-7515-5
Type
conf
DOI
10.1109/ASPDAC.2011.5722224
Filename
5722224
Link To Document