DocumentCode :
2633525
Title :
Time scale combining of conservative parallel discrete event simulations
Author :
Sellami, Hatem ; Yalamanchili, Sudhakar
Author_Institution :
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
fYear :
1995
fDate :
25-28 Apr 1995
Firstpage :
599
Lastpage :
603
Abstract :
Very often many parameterized trials of a simulation are required. Modifying parameters of a simulation will often only modify a fraction of the work. This paper proposes time scale combining (TSC) to combine multiple independent simulation trials by sharing common events and inter-processor communication messages across distinct simulations. As a result, some of the overhead experienced in parallel computation can be amortized across these multiple simulations, reducing the total time required to execute all of the simulations. The results from an experimental evaluation on both asynchronous and synchronous parallel architectures are presented
Keywords :
discrete event simulation; parallel processing; discrete event simulations; distinct simulations; inter-processor communication messages; parallel architectures; parallel discrete event simulations; simulation trials; time scale combining; Clocks; Computational modeling; Concurrent computing; Discrete event simulation; Error correction; Laboratories; Parallel processing; Radio access networks; Trions;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel Processing Symposium, 1995. Proceedings., 9th International
Conference_Location :
Santa Barbara, CA
Print_ISBN :
0-8186-7074-6
Type :
conf
DOI :
10.1109/IPPS.1995.395886
Filename :
395886
Link To Document :
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