DocumentCode :
2633882
Title :
25th IEEE VLSI Test Symmposium - Title page
fYear :
2007
fDate :
6-10 May 2007
Abstract :
The following topics are dealt with: delay test quality; memory testing; online testing; ATPG for delay faults; fault prediction and evaluation; analog test; fault tolerant nanoscale architectures; mixed signal testing; SOC testing; and design for test
Keywords :
automatic test pattern generation; delays; design for testability; fault tolerance; integrated memory circuits; mixed analogue-digital integrated circuits; system-on-chip; ATPG; analog test; automatic test pattern generation; delay faults; delay test quality; design for test; fault prediction; fault tolerance; memory test; mixed signal testing; online test; system-on-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 2007. 25th IEEE
Conference_Location :
Berkeley, CA
ISSN :
1093-0167
Print_ISBN :
0-7695-2812-0
Type :
conf
DOI :
10.1109/VTS.2007.2
Filename :
4209871
Link To Document :
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