DocumentCode
2634226
Title
Efficient sensitivity-based capacitance modeling for systematic and random geometric variations
Author
Bi, Yu ; Harpe, P. ; Van Der Meijs, N.P.
Author_Institution
Fac. of EEMCS, Tech. Univ. Delft, Delft, Netherlands
fYear
2011
fDate
25-28 Jan. 2011
Firstpage
61
Lastpage
66
Abstract
This paper presents a highly efficient sensitivity-based method for capacitance extraction, which models both systematic and random geometric variations. This method is applicable for BEM-based Layout Parasitic Extraction (LPE) tools. It is shown that, with only one system solve, the nominal parasitic capacitances as well as its relative standard deviations caused by both systematic and random geometric variations can be obtained. The additional calculation for both variations can be done at a very modest computational time, which is negligible compared to that of the standard capacitance extraction without considering any variation. Specifically, using the proposed method, experiments and a case study have been analyzed to show the impact of the random variation on the capacitance for a real design.
Keywords
capacitance; geometry; integrated circuit interconnections; integrated circuit layout; LPE tools; capacitance extraction; layout parasitic extraction; random geometric variations; sensitivity-based capacitance modeling; systematic geometric variations; Capacitance; Computational modeling; Conductors; Correlation; Integrated circuit modeling; Sensitivity; Systematics;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference (ASP-DAC), 2011 16th Asia and South Pacific
Conference_Location
Yokohama
ISSN
2153-6961
Print_ISBN
978-1-4244-7515-5
Type
conf
DOI
10.1109/ASPDAC.2011.5722262
Filename
5722262
Link To Document