Title :
Track routing optimizing timing and yield
Author :
Gao, X. ; Macchiarlo, L.
Author_Institution :
Dept. of Electr. Eng., Univ. of Hawaii at Manoa, Honolulu, HI, USA
Abstract :
In this paper, we propose a track routing algorithm for timing and yield optimization. The algorithm solves the problem in two stages: wire ordering, and wire spacing and sizing. The wire ordering problem is solved by an algorithm based on wire merging. For the wire spacing and sizing problem, we show that it can be represented as a Mixed Linear Geometric Programming (MLGP) problem which can be transformed into a convex optimization problem. Since general nonlinear convex optimization may take a long running time, we propose a heuristic that solves the problem much faster. Experimental results show that, compared to the algorithm that only optimizes yield, our algorithm is able to improve the minimum timing slack by 20%.
Keywords :
circuit optimisation; convex programming; geometric programming; integrated circuit interconnections; linear programming; network routing; mixed linear geometric programming; nonlinear convex optimization; timing optimization; track routing algorithm; wire ordering; wire sizing; wire spacing; yield optimization; Geometric Programming; Track routing; timing; yield;
Conference_Titel :
Design Automation Conference (ASP-DAC), 2011 16th Asia and South Pacific
Conference_Location :
Yokohama
Print_ISBN :
978-1-4244-7515-5
DOI :
10.1109/ASPDAC.2011.5722265