DocumentCode
2634360
Title
Enhanced Resolution Jitter Testing Using Jitter Expansion
Author
Choi, Hyun ; Han, Donghoon ; Chatterjee, Abhijit
Author_Institution
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA
fYear
2007
fDate
6-10 May 2007
Firstpage
104
Lastpage
109
Abstract
This paper presents a hardware jitter expansion technique to enable high-resolution jitter measurement of multi-GHz digital signals. To realize high-resolution timing analysis, the jitter is reconstructed on a low-speed signal and jitter measurements are made on this signal instead of the original high-speed signal. The reconstructed jitter on the low-speed signal occurs on a proportionately larger time-scale as opposed to the original jitter on the high-speed signal. Consequently, the jitter on the low-speed signal can be measured easily using conventional jitter measurement techniques and mapped back to its corresponding value relative to the high-speed signal. The approach allows one or two orders of magnitude smaller jitter values to be measured than standard jitter measurement techniques available today. The proposed hardware is easily implemented as a front-end to any existing jitter measurement system. Simulation data and hardware measurements are presented to prove the viability of the proposed scheme.
Keywords
data communication; integrated circuit testing; jitter; digital signals; jitter expansion; jitter measurements; jitter testing; Bandwidth; Circuit testing; Data communication; Hardware; Jitter; Measurement techniques; Noise measurement; Phase noise; Sampling methods; Signal analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 2007. 25th IEEE
Conference_Location
Berkeley, CA
ISSN
1093-0167
Print_ISBN
0-7695-2812-0
Type
conf
DOI
10.1109/VTS.2007.31
Filename
4209898
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