DocumentCode :
2634809
Title :
Silicon Evaluation of Static Alternative Fault Models
Author :
Schuermyer, Chris ; Pangilinan, Jewel ; Jahangiri, Jay ; Keim, Martin ; Rajski, Janusz ; Benware, Brady
Author_Institution :
LSI Logic Corp., Gresham, OR
fYear :
2007
fDate :
6-10 May 2007
Firstpage :
265
Lastpage :
270
Abstract :
This paper presents an extensive study on evaluating the effects of static alternative fault models (AFM) on product quality in the face of the latest defect screening techniques. The fault models that are presented in this research are multiple-detect stuck-at, static transition fault, and layout-based deterministic bridges. The results show the quality impact when these new fault models are combined with a high quality stuck-at and TDF test sets
Keywords :
fault simulation; integrated circuit modelling; logic testing; defect screening; layout-based deterministic bridges; multiple-detect stuck-at fault; product quality; silicon evaluation; static alternative fault models; static transition fault; Automatic test pattern generation; Bridges; Fault detection; Fault diagnosis; Large scale integration; Logic; Production; Silicon; Testing; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 2007. 25th IEEE
Conference_Location :
Berkeley, CA
ISSN :
1093-0167
Print_ISBN :
0-7695-2812-0
Type :
conf
DOI :
10.1109/VTS.2007.74
Filename :
4209923
Link To Document :
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