Title :
Practical implications of chip-level statistical electromigration
Author :
Schmitz, Anthony
Author_Institution :
Logic Technol. Dev. Quality & Reliability, Intel Corp., Hillsboro, OR, USA
Abstract :
The accurate setting of electromigration (EM) design guidelines early is necessary to achieve chip-level fail goals. The issue is even more critical with the recognition of the percentage fail as a stochastic issue based on the individual EM elements. The challenge is the degree to fix those elements prior to the knowledge of chip-level fail rate. This paper will demonstrate a test case and approaches to early design guidelines which have shown success at meeting chip-level EM fail goals.
Keywords :
electromigration; failure analysis; statistical analysis; stochastic processes; EM design guidelines; chip-level fail goals; chip-level statistical electromigration; early design guidelines; individual EM elements; stochastic issue; test case; Current density; Electromigration; Guidelines; Junctions; Reliability engineering; Temperature sensors; Electromigration; chip-level; copper interconnects; statistical budgeting;
Conference_Titel :
Reliability Physics Symposium (IRPS), 2012 IEEE International
Conference_Location :
Anaheim, CA
Print_ISBN :
978-1-4577-1678-2
Electronic_ISBN :
1541-7026
DOI :
10.1109/IRPS.2012.6241867