Efficient RTL Coverage Metric for Functional Test Selection

Author

Kang, Jian ; Seth, Sharad C. ; Gangaram, Vijay

Author_Institution

Dept. of Comput. Sci. & Eng., Nebraska Univ., Lincoln, NE

fYear

2007

fDate

6-10 May 2007

Firstpage

318

Lastpage

324

Abstract

For performance-critical microprocessors, efficient test-selection methods are needed for reusing a subset of functional validation tests to detect manufacturing defects. Our new input/output transition fault-coverage metric (TRIO) at the register-transfer level is shown to perform much better than current metric in test selection at only an incrementally higher computational cost. TRIO may also be used for testability analysis early in the design cycle

Keywords

design for testability; integrated circuit testing; microprocessor chips; RTL coverage metric; functional test selection; functional validation tests; manufacturing defect detection; performance-critical microprocessors; register-transfer level; testability analysis; transition fault-coverage metric; Automatic testing; Circuit faults; Circuit testing; Computational efficiency; Computational modeling; Logic; Manufacturing; Microprocessors; Performance evaluation; Semiconductor device manufacture;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Test Symposium, 2007. 25th IEEE

Conference_Location

Berkeley, CA

ISSN

1093-0167

Print_ISBN

0-7695-2812-0

Type

conf

DOI

10.1109/VTS.2007.30

Filename

4209931

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2634961