Title :
Abnormal ESD failure mode with low-voltage turn-on phenomenon of LDMOS output driver
Author :
Park, Jaeyoung ; Orshansky, Michael
Author_Institution :
Electr. & Comput. Eng., Univ. of Texas at Austin, Austin, TX, USA
Abstract :
An abnormal ESD failure mode caused by a low-voltage turn-on phenomenon in an LDMOS is found on a DC-DC converter chip. Experimental investigation has shown that gate-coupling is the root cause of such low-voltage turn-on behavior. To prevent this behavior, a novel gate turn-off circuit is proposed. The solution is effective: the test chip measurements show an increase in HBM values from 1500 V to 4000 V.
Keywords :
MOSFET; electrostatic discharge; logic gates; DC-DC converter chip; LDMOS output driver; abnormal ESD failure mode; gate coupling; gate turn-off circuit; low voltage turn-on behavior; low voltage turn-on phenomenon; test chip measurement; voltage 1500 V to 4000 V; Clamps; Couplings; Electrostatic discharges; Integrated circuit modeling; Logic gates; Robustness; Thyristors; Electrostatic discharge; Gate turn-off circuit; Human Body Model; LDMOS; Machine Model;
Conference_Titel :
Reliability Physics Symposium (IRPS), 2012 IEEE International
Conference_Location :
Anaheim, CA
Print_ISBN :
978-1-4577-1678-2
Electronic_ISBN :
1541-7026
DOI :
10.1109/IRPS.2012.6241891
