DocumentCode
2635328
Title
At-Speed Testing of Core-Based System-on-Chip Using an Embedded Micro-Tester
Author
Tuna, Matthieu ; Benabdenbi, Mounir ; Greiner, Alain
Author_Institution
Univ. Pierre et Marie Curie, Paris
fYear
2007
fDate
6-10 May 2007
Firstpage
447
Lastpage
454
Abstract
In SoC designs, limited test access to internal cores, low-cost external tester´s lack of accuracy and slow frequencies make application of at-speed tests impractical. Therefore, this paper presents an embedded micro-tester for testing IEEE1500-compliant SoCs. In the proposed approach, the test program is no more executed by the external tester but by the embedded micro-tester. Under the control of the embedded SoC microprocessor, the micro-tester executes the test programs stored outside of the SoC in an external memory. The micro-tester supports stuck-at testing as well as both at-speed testing techniques: launch-on-last-shift (LOLS) and launch-on-capture (LOC). Using the ITC´02 benchmarks, experimental results are presented: test application time, test data volume and area overhead
Keywords
automatic test equipment; embedded systems; logic testing; system-on-chip; IEEE1500; ITC´02 benchmarks; SoC designs; core-based system-on-chip; embedded SoC microprocessor; embedded micro-tester; internal core test access; launch-on-capture; launch-on-last-shift; stuck-at testing; Benchmark testing; Frequency; Geometry; Lab-on-a-chip; Logic testing; Microprocessors; Performance evaluation; Protocols; System testing; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 2007. 25th IEEE
Conference_Location
Berkeley, CA
ISSN
1093-0167
Print_ISBN
0-7695-2812-0
Type
conf
DOI
10.1109/VTS.2007.16
Filename
4209952
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