Title :
A 3.6 Gb/s 60 mW 4:1 multiplexer in 0.35-µm CMOS
Author :
Li, Yujun ; Feng, Jun ; Zhang, Li ; Li, Wei
Author_Institution :
Inst. of RF & OE-ICs, Southeast Univ., Nanjing, China
Abstract :
A tree-type 4:1 multiplexer (MUX) is designed by employing CMOS logic and eliminating impedance matching of the signal ports. The proposed circuit is realized in a 0.35-μm CMOS process. With the whole power consumption of 60 mW from a 3.3 V supply voltage, the MUX can operate at an output rate up to 3.6 Gb/s. From the measured eye-diagrams, the MUX exhibits an output voltage swing of 250 mVpp with 50 Ω load(single-ended).
Keywords :
CMOS logic circuits; multiplexing equipment; optical communication equipment; CMOS logic; CMOS multiplexer; bit rate 3.6 Gbit/s; power 60 mW; size 0.35 mum; voltage 3.3 V;
Conference_Titel :
Signals Systems and Electronics (ISSSE), 2010 International Symposium on
Conference_Location :
Nanjing
Print_ISBN :
978-1-4244-6352-7
DOI :
10.1109/ISSSE.2010.5607020
