Title :
A 0.5V CMOS LNA for 2.4-GHz WSN application
Author :
Chen, Liang ; Li, Zhiqun ; Wang, Zhigong
Author_Institution :
Inst. of RF- & OE-ICs, Southeast Univ., Nanjing, China
Abstract :
This study was initiated to design a low noise amplifier (LNA), which could work with ultra low voltage of 0.5V and was optimized for WSN application using SMIC 0.13 μm RF-CMOS technology. The topology of differential inductance degenerated folded cascode based on power-constrained simultaneous noise and input matching (PCSNIM) technique was adopted. Chosen circuit demonstrated a power gain of 16.5 dB, consuming 3.3 mW DC power, showing 0.78 dB NF and an input 1-dB compression point of -20.9 dBm. Both input match (S11) and output match (S22) were below -19 dB. The results indicate that this LNA is fully applicable to the low voltage and low power application.
Keywords :
CMOS analogue integrated circuits; UHF amplifiers; UHF integrated circuits; low noise amplifiers; low-power electronics; wireless sensor networks; CMOS LNA; PCSNIM technique; SMIC RF-CMOS technology; WSN; differential inductance degenerated folded cascode topology; frequency 2.4 GHz; gain 16.5 dB; input matching technique; low noise amplifier; noise figure 0.78 dB; power 3.3 mW; power-constrained simultaneous noise; size 0.13 mum; voltage 0.5 V; CMOS integrated circuits; Impedance; Impedance matching; Inductors; Noise; Resistance; Wireless sensor networks;
Conference_Titel :
Signals Systems and Electronics (ISSSE), 2010 International Symposium on
Conference_Location :
Nanjing
Print_ISBN :
978-1-4244-6352-7
DOI :
10.1109/ISSSE.2010.5607033
