Correlation of 1/ƒ noise and high-voltage-stress-induced degradation in LDMOS

1/f noise observed on differently processed high-power, RESURF LDMOS transistors has been correlated with degradation in the drain current and transconductance induced by DC stressing. The effects of stressing are analyzed on individual resistance and noise components in the channel and in the extended drain regions under the gate and field oxides. It has been found that the LDMOS does not follow conventional CMOS noise models due to asymmetric extended drain. A physical model has been derived for the fluctuations in such devices in the lights of Unified 1/f Noise Model. The increase in 1/f noise was found to emerge earlier and in a more pronounced manner in the noise components compared to degradation observed in DC parameters. Such severe noise degradation directly impacts the dielectric-Si interface quality and reliability and eventually affects the device lifetime.