Hardware requirements to digital VLSI implementation of neural networks

The authors focus on efficient implementation of artificial neural networks by means of digital VLSI hardware. They tackle the issue of hardware constraints, such as weights and states precision, finite arithmetic, and activation function realization. The emphasis is on the digital implementation of the learning phase and backpropagation networks. A new theorem is presented, which states the precision requirement for weight representation. Such precision is strictly related to learning parameters and activation mappers. Emulation of digital neural network hardware employing fixed-point data representation gives full support to the theoretical analyses