Design and implementation of a high-efficiency 240-W power supply for PC applications

This paper presents a high-efficiency power supply topology. The front stage is a power factor corrector (PFC) utilizing the single-ended primary inductor converter (SEPIC) topology. The presented SEPIC PFC is operated under continuous conduction mode (CCM) with a transition-mode (TM) PFC controller and coupled inductors. The input current waveform remains continuous to reduce the size of the EMI filter and increase the power density. Due to the inherent voltage step- up/down features of the SEPIC PFC, the input voltage of the post-stage half-bridge series resonant converter (HB-SRC) can be decreased to reduce the voltage stresses on the power switches. High efficiency and low cost can be achieved. Circuit topologies and design considerations for the studied high-performance power supply are analyzed and discussed in detail. High-efficiency requirements for the Energy Star standards can be satisfied.