DocumentCode :
2637641
Title :
Architecture and DSP Implementation of a DVB-S2 Baseband Demodulator
Author :
Savvopoulos, P. ; Papandreou, N. ; Antonakopoulos, Th
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Patras, Rio-Patras, Greece
fYear :
2009
fDate :
27-29 Aug. 2009
Firstpage :
441
Lastpage :
448
Abstract :
This paper presents the design and implementation of a baseband demodulator for DVB-S2 satellite receivers. In order to meet the requirements of different complex and multidomain signal processing stages of the DVB-S2 baseband signal-flow, the presented architecture is based on efficient fixed-point implementation of the various demodulation algorithms and on the use of a dynamic time-sharing scheduler for the various DSP software tasks. The prototyping of the demodulator and its verification in the design of a complete digital DVB-S2 satellite receiver using a versatile testbed is also presented.
Keywords :
demodulators; digital signal processing chips; digital video broadcasting; direct broadcasting by satellite; radio receivers; DSP implementation; DSP software tasks; DVB-S2 baseband demodulator; DVB-S2 baseband signal-flow; DVB-S2 satellite receivers; demodulator prototyping; dynamic time-sharing scheduler; fixed-point implementation; multidomain signal processing stages; versatile testbed; Baseband; Computer architecture; Demodulation; Digital signal processing; Digital video broadcasting; Satellites; Scheduling algorithm; Signal processing; Signal processing algorithms; Software algorithms;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Digital System Design, Architectures, Methods and Tools, 2009. DSD '09. 12th Euromicro Conference on
Conference_Location :
Patras
Print_ISBN :
978-0-7695-3782-5
Type :
conf
DOI :
10.1109/DSD.2009.228
Filename :
5350209
Link To Document :
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