Title :
1/f noise corner modeling
Author :
Pflanzl, W.C. ; Seebacher, E. ; Huszka, Zoltan
Author_Institution :
Austriamicrosyst. AG, Premstatten
Abstract :
This paper presents a new accurate method for generation of 1/f noise worst cases (WC) based on statistical measurement data. This is implemented in existing state of the art design simulators with a scaled flicker noise model for CMOS. Verification is shown on a noise sensitive analog circuitry as a benchmark for robust flicker noise design. The methodology presented can easily be extended to other devices like BJTs or any other
Keywords :
1/f noise; CMOS integrated circuits; flicker noise; integrated circuit modelling; statistical analysis; 1/f noise corner modeling; CMOS integrated circuit; design simulators; noise sensitive analog circuit; scaled flicker noise model; statistical measurement; 1f noise; Charge carriers; Circuit noise; Fluctuations; Low-frequency noise; Noise generators; Noise robustness; Optical wavelength conversion; Resistors; Semiconductor device modeling;
Conference_Titel :
Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006. Proceedings of the International Conference
Conference_Location :
Gdynia
Print_ISBN :
83-922632-2-7
DOI :
10.1109/MIXDES.2006.1706551
