High-level design for image processing on FPGA using Xilinx AccelDSP

Author

Said, Yahia ; Saidani, Taoufik ; Atri, Mohamed

Author_Institution

Fac. of Sci., Lab. of Electron. & Microelectron. (EμE), Monastir, Tunisia

fYear

2014

fDate

17-19 Jan. 2014

Firstpage

1

Lastpage

5

Abstract

This paper presents the design and implementation of image processing application on field programmable gate array (FPGA). To improve the implementation time, Xilinx AccelDSP, a software for generating hardware description language (HDL) from a high-level MATLAB description has been used. An FPGA-based architecture for Color Space Conversion has been proposed. The design was implemented on Spartan 3A DSP and Virtex 5 devices. Obtained results are discussed and compared with others architectures.

Keywords

field programmable gate arrays; hardware description languages; high level synthesis; image processing; FPGA; Xilinx AccelDSP; field programmable gate array; hardware description language; high level MATLAB description; high level design; image processing; Field programmable gate arrays; Generators; Hardware; Image color analysis; MATLAB; Mathematical model; Streaming media; FPGA; HLS tools; Image Processing; Matlab; Xilinx AccelDSP; design flow;

fLanguage

English

Publisher

ieee

Conference_Titel

Computer Applications and Information Systems (WCCAIS), 2014 World Congress on

Conference_Location

Hammamet

Print_ISBN

978-1-4799-3350-1

Type

conf

DOI

10.1109/WCCAIS.2014.6916577

Filename

6916577