Low Power Discriminators With Input Offsets Correction For Fast Multichannel Recording ASIC

Multichannel ASIC for digital X-ray imaging requires one or more discriminators in each recording channel. The critical parameters of these discriminators are low power consumption and low offset spreads from channel to channel. In the readout electronics dedicated to work with high rates of input pulses the charge sensitive amplifier, filter stages and discriminators are often DC coupled. Such approach generates additional channel to channel spread of DC level at discriminators inputs. In this paper we present the structure of discriminators pair, which allows to select pulses according to their amplitudes and can work effectively in multichannel fast readout ASIC due to additional correction circuits implemented in each channel. We present the architecture of the discriminators, the results of Monte Carlo simulations of input offsets spreads and the measurement results of such structures which were implemented in 64-channel ASIC fabricated in 0.35 mum CMOS technology