Title :
Postion Paper For "Coupling Of Synthesis And Layout: Challenges And Solutions"
Author :
Suhashi, Takashi Mit
Author_Institution :
TOSHIBA Corp.
Keywords :
Algorithm design and analysis; Application specific integrated circuits; Capacitance; Circuit synthesis; Delay estimation; Large scale integration; Logic; Timing; Wire; Wiring;
Conference_Titel :
Design Automation Conference 1998. Proceedings of the ASP-DAC '98. Asia and South Pacific
Print_ISBN :
0-7803-4425-1
DOI :
10.1109/ASPDAC.1998.669431
