Title :
Optimization Of Speed And Power In A 16-bit Carryskip Adder In 70nm Technology
Author :
Kashfi, F. ; Masoumi, N.
Author_Institution :
Tehran Univ.
Abstract :
In this article, speed and power dissipation of a 16-bit carry skip adder is optimized using different optimization methods. This adder is implemented in 70nm technology. First the worst carry propagation time is reduced by changing logic style and using genetic algorithm to optimize the skip network of the circuit. And then the power dissipation of the circuit is optimized by applying MTCMOS technology and genetic algorithm optimization on feature size of the transistors. With these methods we reached 7% improvement in circuit performance and 44% reduction in power consumption of the circuit
Keywords :
CMOS logic circuits; adders; genetic algorithms; nanotechnology; 16 bit; 70 nm; MTCMOS technology; carry-skip adder; genetic algorithm; power dissipation; power optimization; skip network; speed optimization; Adders; CMOS technology; Circuit optimization; Energy consumption; Genetic algorithms; Logic; Low voltage; Optimization methods; Power dissipation; Signal generators;
Conference_Titel :
Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006. Proceedings of the International Conference
Conference_Location :
Gdynia
Print_ISBN :
83-922632-2-7
DOI :
10.1109/MIXDES.2006.1706599
