Low power realization of FIR filters implemented using distributed arithmetic

We present a technique for low power realization of Finite Impulse Response (FIR) filters implemented using Distributed Arithmetic. In most applications, the distribution profile of input data values is known. The proposed technique uses a data encoding which can be tuned to the specific distribution profile so as to reduce toggles in the shift register chain. We present a generic Nega-Binary coding approach and show how a specific Nega-Binary scheme can be derived to achieve maximum power reduction. We also show how the binary to Nega-binary conversion can be performed bit-serially with minimal area (and hence power dissipation) overhead. The paper finally presents a shift-free implementation which uses memory array to store data values. We present a technique based on Gray coded addressing to reduce the power dissipation in such implementations