DocumentCode :
263927
Title :
A high performance MQ decoder architecture in JPEG2000
Author :
Horrigue, Layla ; Saidani, Taoufik ; Ghodhbane, Refka ; Atri, Mohamed
Author_Institution :
Electron. & Micro-Electron. Lab., Fac. of Sci. of Monastir, Monastir, Tunisia
fYear :
2014
fDate :
17-19 Jan. 2014
Firstpage :
1
Lastpage :
5
Abstract :
For instance the JPEG 2000 is the latest international standard for still image compression supporting a rich set of features. Compared to existing JPEG image compression techniques, this standard not only has better compression ratios but also offers some exciting features. The MQ decoder of the JPEG2000 standard is an important bottleneck for real-time applications. In order to meet the real-time requirement, high speed MQ decoder architecture must be designed carefully. In this paper we propose a high speed and area efficient architecture of MQ decoder which is implemented on different FPGA platforms.
Keywords :
data compression; decoding; image coding; FPGA platforms; JPEG image compression techniques; JPEG2000 standard; high performance MQ decoder architecture; Context; Decoding; Image coding; Read only memory; Registers; Standards; Transform coding; FPGA; JPEG-2000; MQ-decoder; implementation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Applications and Information Systems (WCCAIS), 2014 World Congress on
Conference_Location :
Hammamet
Print_ISBN :
978-1-4799-3350-1
Type :
conf
DOI :
10.1109/WCCAIS.2014.6916644
Filename :
6916644
Link To Document :
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